A. Banerjee, “Sub-THz Integrated Circuits: Challenges and Opportunities,” 2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS), Springfield, MA, USA, 2024, pp. 764-768, doi: 10.1109/MWSCAS60917.2024.10658720.
N. Collaert, A. Alian, A. Banerjee, et al., “III-V/III-N technologies for next generation high-capacity wireless communication,” 2022 International Electron Devices Meeting (IEDM), San Francisco, CA, USA, 2022, pp. 11.5.1-11.5.4. doi:10.1109/IEDM45625.2022.10019555
Aritra Banerjee and Piet Wambacq, “A 130GHz Two-Stage Common-Base Power Amplifier in 250nm InP,” 2022 47th International Conference on Infrared, Millimeter and Terahertz Waves (IRMMW-THz), 2022, pp. 1-2. doi:10.1109/IRMMW- THz50927.2022.9895854
E. C. Strinati, M. Peeters, C. R. Neve, M. D. Gomony, A. Cathelin, M. R. Boldi, M. Ingels, A. Banerjee, P. Chevalier, B. Kozicki, D. Belot, “The Hardware Foundationof 6G: The NEW-6G Approach,” 2022 Joint European Conference on Networks and Communications & 6G Summit (EuCNC/6G Summit), 2022, pp. 423-428. doi:10.1109/EuCNC/6GSummit54941.2022.9815700
N. Collaert, A. Alian, A. Banerjee et al., “From 5G to 6G: will compound semiconductors make the difference?,” 2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT), 2020, pp. 1-4. doi:10.1109/ICSICT49897.2020.9278253
Aritra Banerjee, Lei Zhang, Hua Wang and Piet Wambacq, “Sub-THz and THz Signal Generation Using Photonic and Electronic Techniques (Invited Paper),” 2019 IEEE MTT-S International Microwave Conference on Hardware and Systems for 5G and Beyond (IMC-5G), Atlanta, GA, USA, 2019, pp. 1-3. doi:10.1109/IMC- 5G47857.2019.9160391
Aritra Banerjee et al., “Millimeter-Wave Transceivers for Wireless Communication, Radar, and Sensing : (Invited Paper),” 2019 IEEE Custom Integrated Circuits Conference (CICC), Austin, TX, USA, 2019, pp. 1-11. doi:10.1109/CICC.2019.8780147
Aritra Banerjee, Rahmi Hezar and Lei Ding, “Efficiency improvement techniques for RF power amplifiers in deep submicron CMOS”, 2015 IEEE Custom Integrated Circuits Conference (CICC), San Jose, CA, Sept. 2015, pp. 1-4. doi:10.1109/CICC.2015.7338449
Aritra Banerjee, Lei Ding and Rahmi Hezar, “High efficiency multi-mode outphasing RF power amplifier in 45nm CMOS”, IEEE 41st European Solid-State Circuits Conference (ESSCIRC 2015), Graz, Sept. 2015, pp. 168-171. doi:10.1109/ESSCIRC.2015.7313855
Suvadeep Banerjee, Man Prakash Gupta, Aritra Banerjee, Satish Kumar and Abhijit Chatterjee, “Digitally-compatible ring oscillator frequency driven tuning of CN-TFT amplifiers: Performance compensation under statistical and morphological variations”, 2015 IEEE 20th International Mixed-Signals Testing Workshop (IMSTW), Paris, June 2015, pp. 1-6. doi:10.1109/IMS3TW.2015.7177860
Aritra Banerjee, Rahmi Hezar, Lei Ding, Nathan Schemm and Baher Haroun, “A 29.5 dBm class-E outphasing RF power amplifier with performance enhancement circuits in 45nm CMOS”, IEEE 40th European Solid State Circuits Conference (ESSCIRC 2014), Venice Lido, Sept. 2014, pp. 467-470. doi:10.1109/ESSCIRC.2014.6942123
Suvadeep Banerjee, Debashis Banerjee, Aritra Banerjee, Kyujeong Lee and Abhijit Chatterjee, “Low cost implicit built-in self-test of passive RFID Tags”, 19th Annual International Mixed-Signals, Sensors, and Systems Test Workshop Proceedings, Porto Alegre, Sept. 2014, pp. 1-6. doi:10.1109/IMS3TW.2014.6997390
Abhijit Chatterjee, Hua Wang, Aritra Banerjee, Debashis Banerjee, Vishwanath Natarajan, Shreyas Sen and Shyam Devarakond, “Design of self-healing mixed-signal/RF systems and support CAD tools: A scalable approach”, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), College Station, TX, Aug. 2014, pp. 1065-1068. doi:10.1109/MWSCAS.2014.6908602
Sabyasachi Deyati, Barry J. Muldrey, Aritra Banerjee and Abhijit Chatterjee, “Atomic model learning: A machine learning paradigm for post silicon debug of RF/analog circuits”, 2014 IEEE 32nd VLSI Test Symposium (VTS), Napa, CA, April 2014, pp. 1-6. doi:10.1109/VTS.2014.6818791
Debashis Banerjee, Aritra Banerjee, Shyam Devarakond and Abhijit Chatterjee, “Adaptive MIMO RF Systems: Post Manufacture and Real-Time Tuning for Performance Maximization and Power Minimization”, IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 1095-1099, 4-7 August 2013. doi:10.1109/MWSCAS.2013.6674843
Suvadeep Banerjee, Aritra Banerjee, Abhijit Chatterjee and Jacob Abraham, “Real- Time Checking of Linear Control Systems Using Analog Checksums”, IEEE 19th International On-Line Testing Symposium (IOLTS), pp. 122-127, 8-10 July 2013. doi:10.1109/IOLTS.2013.6604062
Shyam Kumar Devarakond, Debashis Banerjee, Aritra Banerjee, Shreyas Sen and Abhijit Chatterjee, “Efficient System Level Testing and Adaptive Tuning of MIMO-OFDM Wireless Transmitters”, 18th IEEE European Test Symposium (ETS), pp. 1-6, 27-30 May 2013. doi:10.1109/ETS.2013.6569363
Aritra Banerjee and Abhijit Chatterjee, “An Adaptive Class-E Power Amplifier With Improvement In Efficiency, Reliability And Process Variation Tolerance”, IEEE International Symposium on Circuits and Systems (ISCAS), pp. 745-748, 19-23 May 2013. doi:10.1109/ISCAS.2013.6571954
Debesh Bhatta, Aritra Banerjee, Sabyasachi Deyati, Nicholas Tzou and Abhijit Chatterjee, “Low Cost Signal Reconstruction Based Testing of RF Components Using Incoherent Undersampling”, 14th Latin American Test Workshop (LATW), pp. 1-5, 3-5 April 2013. doi:10.1109/LATW.2013.6562670
Sabyasachi Deyati, Aritra Banerjee, Barry J. Muldrey and Abhijit Chatterjee, “VAST: Post-Silicon VAlidation and Diagnosis of RF/Mixed-Signal Circuits Using Signature Tests”, IEEE 26th International Conference on VLSI Design, pp. 314-319, 5-10 Jan. 2013. doi:10.1109/VLSID.2013.207
Debashis Banerjee, Aritra Banerjee and Abhijit Chatterjee, “Adaptive RF Front-end Design via Self-discovery: Using Real time Data to Optimize Adaptation Control”, IEEE 26th International Conference on VLSI Design, pp. 197-202, 5-10 Jan. 2013. doi:10.1109/VLSID.2013.188
Abhijit Chatterjee, Sabyasachi Deyati, Barry Muldrey, Shyam Devarakond, Aritra Banerjee and Michael Giardino, “Signature Testing for Post Silicon Validation of RF/Analog Circuits”, 8 th IEEE International Workshop on Silicon Debug and Diagnosis (SDD), 8-9 Nov. 2012.
Abhijit Chatterjee, Sabyasachi Deyati, Barry Muldrey, Shyam Devarakond and Aritra Banerjee, “Validation signature testing: A methodology for post-silicon validation of analog/mixed-signal circuits”, IEEE/ACM International Conference on Computer- Aided Design (ICCAD), pp. 553-556, 5-8 Nov. 2012. doi:10.1145/2429384.2429504
Debashis Banerjee, Shreyas Sen, Aritra Banerjee and Abhijit Chatterjee, “Low-power adaptive RF system design using real time fuzzy noise-distortion control”, ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), pp. 249- 254, 30 July – 1 August 2012. doi:10.1145/2333660.2333719
Sabyasachi Deyati, Aritra Banerjee and Abhijit Chatterjee, “Pilot symbol driven monitoring of electrical degradation in RF transmitter systems using model anomaly diagnosis”, IEEE 18th International On-Line Testing Symposium (IOLTS), pp. 142 145, 27-29 June 2012. doi:10.1109/IOLTS.2012.6313860
Aritra Banerjee, Shyam Devarakond, Shreyas Sen, Debashis Banerjee and Abhijit Chatterjee, “Testing of digitally assisted adaptive analog/RF systems using tuning knob – performance space estimation”, 17th IEEE European Test Symposium (ETS), pp. 1, 28-31 May 2012. doi:10.1109/ETS.2012.6233038
Aritra Banerjee, Shyam Devarakond, Shreyas Sen, Debashis Banerjee and Abhijit Chatterjee, “Optimal Testing of Digitally Assisted Adaptive RF Systems”, IEEE 18th International Mixed-Signals, Sensors and Systems Test Workshop (IMS3TW), pp. 46- 51, 14-16 May 2012. doi:10.1109/IMS3TW.2012.19
Shyam Devarakond, Debashis Banerjee, Aritra Banerjee, Shreyas Sen and Abhijit Chatterjee, “DSP Driven Parallel EVM Testing of Embedded MIMO-OFDM RF Modules”, IEEE 18th International Mixed-Signals, Sensors and Systems Test Workshop (IMS3TW), pp. 40-45, 14-16 May 2012. doi:10.1109/IMS3TW.2012.18
Aritra Banerjee, Shreyas Sen, Shyam Devarakond and Abhijit Chatterjee, “Accurate signature driven power conscious tuning of RF systems using hierarchical performance models”, IEEE International Test Conference (ITC), pp. 1-9, 20-22 Sept. 2011. doi:10.1109/TEST.2011.6139144
Aritra Banerjee, Subho Chatterjee, Azad Naeemi and Abhijit Chatterjee, “Power Aware Post-manufacture Tuning of Analog Nanocircuits”, 16th IEEE European Test Symposium (ETS), pp. 57-62, 23-27 May 2011. doi:10.1109/ETS.2011.48
Sehun Kook, Aritra Banerjee and Abhijit Chatterjee, “Signature Testing and Diagnosis of High Precision Σ∆ ADC Dynamic Specifications Using Model Parameter Estimation”, 16th IEEE European Test Symposium (ETS), pp. 33-38, 23-27 May 2011. doi:10.1109/ETS.2011.53
Aritra Banerjee, Shreyas Sen, Shyam Devarakond and Abhijit Chatterjee, “Automatic test stimulus generation for accurate diagnosis of RF systems using transient response signatures”, IEEE 29th VLSI Test Symposium (VTS), pp. 58-63, 1-5 May 2011. doi:10.1109/VTS.2011.5783755
Aritra Banerjee, Vishwanath Natarajan, Shreyas Sen, Abhijit Chatterjee, Ganesh Srinivasan and Soumendu Bhattacharya, “Optimized Multitone Test Stimulus Driven Diagnosis of RF Transceivers Using Model Parameter Estimation”, IEEE 24th International Conference on VLSI Design, pp. 274-279, 2-7 Jan. 2011. doi:10.1109/VLSID.2011.65
Shyam Devarakond, Shreyas Sen, Vishwanath Natarajan, Aritra Banerjee, Hyun Choi, Ganesh Srinivasan and Abhijit Chatterjee, “Digitally Assisted Concurrent Built-In Tuning of RF Systems Using Hamming Distance Proportional Signatures”, 19th IEEE Asian Test Symposium (ATS), pp. 283-288, 1-4 Dec. 2010. doi:10.1109/ATS.2010.55
Shyam Devarakond, Shreyas Sen, Aritra Banerjee, Vishwanath Natarajan and Abhijit Chatterjee, “Built-in performance monitoring of mixed-signal/RF front ends using real-time parameter estimation”, IEEE 16th International On-Line Testing Symposium (IOLTS), pp. 77-82, 5-7 July 2010. doi:10.1109/IOLTS.2010.5560231
Aritra Banerjee, Shyam Devarakond, Vishwanath Natarajan, Shreyas Sen and Abhijit Chatterjee, “Optimized digital compatible pulse sequences for testing of RF front end modules”, IEEE 16th International Mixed-Signals, Sensors and Systems Test Workshop (IMS3TW), pp. 1-6, 7-9 June 2010. doi:10.1109/IMS3TW.2010.5502991
Shubhajit Roy Chowdhury, Aniruddha Roy, Aritra Banerjee and Hiranmay Saha, “Design, Simulation and Testing of a High Performance 15-4 Compressor”, 12th IEEE VLSI Design and Test Symposium (VDAT), pp. 147-154, 23-26 July 2008.
Shubhajit Roy Chowdhury, Aritra Banerjee, Aniruddha Roy and Hiranmay Saha, “Design, Simulation and Testing of a High Speed Low Power 15-4 Compressor for High Speed Multiplication Applications”, 1 st International Conference on Emerging Trends in Engineering & Technology (ICETET), pp. 434-438, 16-18 July, 2008.
Aritra Banerjee, Aniruddha Roy, Shubhajit Roy Chowdhury, Avra Kundu, Upendra Kumar Garapati and Hiranmay Saha, “A Novel Approach to Automated Design of IC Layout Mask for Linear and Nonlinear Structures Using LASI”, SPIT-IEEE Colloquium and International Conference, Vol. 2, pp. 6-11, 4-5 February 2008.
Shubhajit Roy Chowdhury, Aritra Banerjee, Aniruddha Roy and Hiranmay Saha, “Design of High Performance Low Power 16 Bit Arithmetic Units Using Kogge-Stone Parallel Prefix Adder Architectures”, SPIT-IEEE Colloquium and International Conference, Vol. 2, pp. 1-5, 4-5 February 2008.
Aritra Banerjee, Barend Van Liempd and Piet Wambacq, “A Stacked Segmented Adaptive Power Amplifier in 22nm FD SOI,” in IEEE Microwave and Wireless Components Letters, vol. 32, no. 8, pp. 983-986, Aug. 2022. doi:10.1109/LMWC.2022.3159601
N. Collaert, A. Alian, A. Banerjee et al., “(Plenary) The Revival of Compound Semiconductors and How They Will Change the World in a 5G/6G Era,” in ECS Transactions, vol. 98, no. 5, pp. 15, Sep. 2020. doi:10.1149/09805.0015ecst
Aritra Banerjee, Lei Ding and Rahmi Hezar, “A High Efficiency Multi-Mode Outphasing RF Power Amplifier With 31.6 dBm Peak Output Power in 45nm CMOS,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 3, pp. 815-828, March 2020. doi:10.1109/TCSI.2019.2954068
Aritra Banerjee, Rahmi Hezar, Lei Ding and Baher Haroun, “A 29.5 dBm Class-E Outphasing RF Power Amplifier With Efficiency and Output Power Enhancement Circuits in 45nm CMOS,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 8, pp. 1977-1988, Aug. 2017. doi:doi: 10.1109/TCSI.2017.2695243
Shyam Devarakond, Shreyas Sen, Aritra Banerjee and Abhijit Chatterjee, “Digitally Assisted Built-In Tuning Using Hamming Distance Proportional Signatures in RF Circuits”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 24, No. 9, pp. 2918-2931, Sept. 2016. doi:10.1109/TVLSI.2016.2526646
Aritra Banerjee and Abhijit Chatterjee, “Automatic Test Stimulus Generation for Diagnosis of RF Transceivers Using Model Parameter Estimation”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 23, No. 12, pp. 3114-3118, Dec. 2015. doi:10.1109/TVLSI.2014.2385863
Rahmi Hezar, Lei Ding, Aritra Banerjee, Joonhoi Hur and Baher Haroun, “A PWM Based Fully Integrated Digital Transmitter/PA for WLAN and LTE Applications”, IEEE Journal of Solid-State Circuits, Vol. 50, No. 5, pp. 1117-1125, May 2015. doi:10.1109/JSSC.2015.2403365
Lei Ding, Joonhoi Hur, Aritra Banerjee, Rahmi Hezar and Baher Haroun, “A 25 dBm Outphasing Power Amplifier With Cross-Bridge Combiners”, IEEE Journal of Solid-State Circuits, Vol. 50, No. 5, pp. 1107-1116, May 2015. doi:10.1109/JSSC.2015.2403316
Aritra Banerjee and Abhijit Chatterjee, “Signature Driven Hierarchical Post-Manufacture Tuning of RF Systems for Performance and Power”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 23, No. 2, pp. 342 355, Feb. 2015. doi:10.1109/TVLSI.2014.2309114
Vishwanath Natarajan, Aritra Banerjee, Shreyas Sen, Shyam Devarakond and Abhijit Chatterjee, “Yield Recovery of RF Transceiver Systems Using Iterative Tuning-Driven Power-Conscious Performance Optimization”, IEEE Design & Test, Vol. 32, No. 1, pp. 61-69, Feb. 2015. doi:10.1109/MDAT.2014.2361716
Debesh Bhatta, Aritra Banerjee, Sabyasachi Deyati, Nicholas Tzou and Abhijit Chatterjee, “Low Cost Signal Reconstruction Based Testing of RF Components using Incoherent Undersampling”, Journal of Electronic Testing, Vol. 30, Issue 2, pp. 213–228, April 2014. doi:10.1007/s10836-014-5442-z
Sehun Kook, Aritra Banerjee and Abhijit Chatterjee, “Dynamic Specification Testing and Diagnosis of High Precision Sigma-Delta ADCs”, IEEE Design & Test, Vol. 30, No. 4, pp. 36-48, August 2013. doi:10.1109/MDT.2012.2217111
Shreyas Sen, Aritra Banerjee, Vishwanath Natarajan, Shyam Devarakond, Hyun Choi and Abhijit Chatterjee, “BIST/Digital-Compatible Testing of RF Devices Using Distortion Model Fitting”, Journal of Electronic Testing, Vol. 28, No. 4, pp. 405-419, August 2012. doi:10.1007/s10836-012-5304-5
Vishwanath Natarajan, Hyun Choi, Aritra Banerjee, Shreyas Sen, Abhijit Chatterjee, Ganesh Srinivasan, Friedrich Taenzler and Soumendu Bhattacharya, “Low Cost EVM Testing of Wireless RF SoC Front-Ends Using Multitones”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 31, No. 7, pp. 1088- 1101, July 2012. doi:10.1109/TCAD.2012.2187652
Vishwanath Natarajan, Shreyas Sen, Aritra Banerjee, Abhijit Chatterjee, Ganesh Srinivasan and Friedrich Taenzler, “Analog Signature Driven Post-manufacture Multidimensional Tuning of RF Systems”, IEEE Design & Test of Computers, Vol. 27, No. 6, pp. 6-17, Nov.-Dec. 2010. doi:10.1109/MDT.2010.123
Shubhajit Roy Chowdhury, Aritra Banerjee, Aniruddha Roy and Hiranmay Saha, “A High Speed 8 Transistor Full Adder Design Using Novel 3 Transistor XOR Gates”, International Journal of Electronics, Circuits and Systems (IJECS), World Academy of Science, Engineering and Technology, Vol. 2, No. 4, pp. 217-223, Fall 2008.
Ayan Acharya, Aritra Banerjee, Amit Konar and Lakhmi C. Jain, “Extension of Ant System Algorithms with Exponential Pheromone Deposition Rule for Improved Performance”, International Journal of Intelligent Defence Support Systems (IJIDSS), Inderscience Publications, Vol. 1, No. 4, pp. 319-354, 2008.
Ayan Acharya, Koushik Chattopadhyay, Aritra Banerjee and Amit Konar, “Novel and Improved Methods of Regular Geometric Shape Recognition from Digital Image Using Artificial Ants”, International Journal of Intelligent Defence Support Systems (IJIDSS), Inderscience Publications, Vol. 1, No. 4, pp. 355-376, 2008.
Aritra Banerjee and Piet Wambacq, “A stacked segmented power amplifier circuitry and a method for controlling a stacked segmented power amplifier circuitry”, U.S. Patent Application Serial No.: 16/788,696; Publication Number: US11223329 B2, US20210249996 Al.
Aritra Banerjee, Rahmi Hezar, Lei Ding and Nathan Richard Schemm, “Multi-branch outphasing system and method”, U.S. Patent Application Serial No.: 14/255,164; Publication Number: US10193508 B2, US20150303961 A1.
Aritra Banerjee, Nathan R. Schemm, Rahmi Hezar, Lei Ding and Baher Haroun, “Tunable power amplifier with wide frequency range”, U.S. Patent Application Serial No.: 14/452,365; Publication Number: US9473078 B2, US20160043698 A1.
Aritra Banerjee, Joonhoi Hur, Baher Haroun, Nathan Richard Schemm, Rahmi Hezar and Lei Ding, “Class-E outphasing power amplifier with efficiency and output power enhancement circuits and method”, U.S. Patent Application Serial No.: 14/312,239, 15/165,339; Publication Number: US9385669 B2, US20150372645 A1, US20160268974 A1.
Aritra Banerjee and Abhijit Chatterjee, “Adaptive Power Amplifiers and Methods of
Making Same”, U.S. Patent Application Serial No.: 13/897,152; Publication Number:
US9024691 B2, US20140340152 A1.